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TSMC and UMC are ready to use “architecture x” in the 65nm process

As it became known, Taiwan Semiconductor Manufacturing Company (TSMC) and UMC almost simultaneously announced their readiness for use in mass production in accordance with 65-nm X Architecture standards, developed by specialists from Cadence Design Systems.

According to TSMC, the use of X Architecture will help its customers reduce costs, increase performance and reduce power consumption of semiconductor chips. Recall that last year TSMC was the first company to release a semiconductor device using X Architecture – it was a graphics processor with a PCI-Express interface, made by order of ATI Technologies. Currently, TSMC, with two factories working with 12-inch wafers, five with 8-inch and one with 6-inch, supports the use of X Architecture in 0.13-micron, 0.11-micron, 90-nm and 65 -nm technological processes.

The architecture in question is characterized by an innovative approach to microscopic interconnecting wires found inside microcircuits. The use of diagonal connection paths in addition to traditional Manhattan wiring allows for reduced chip footprint, improved performance and power consumption, and lower manufacturing costs. The effect is achieved by reducing the length of the conductors and reducing the number of vias used to connect between layers.

As for UMC, this company became the first manufacturer specializing exclusively in semiconductor products to join the group of companies supporting the promotion of X Architecture. UMC offers its customers the production of products using X Architecture at 130, 90 and 65 nm.

Sources: Cadence Design Systems, UMC